1. Field of the Invention
The present invention relates to a semiconductor storage device and a method for manufacturing the semiconductor storage device, particularly to a NAND semiconductor storage device including a memory cell transistor, a selection gate transistor, and a high-voltage peripheral circuit transistor and a method for manufacturing the semiconductor device.
2. Related Art
In a conventional semiconductor storage device, a gap between word lines is filled with an oxide film or a nitride film. As a result, the gap between the word lines is shortened with shrink of devices, and as a result, there is a problem that a programming speed is lowered by a parasitic capacitance generated between floating gate electrodes of adjacent word lines or between the floating gate electrode and diffusion layers.
In order to solve the problem, there has been proposed a technique, in which an oxide film less buried is deposited on the word line and between the word lines, an air gap (cavity portion) is formed between the adjacent floating gate electrodes, thereby reducing the parasitic capacitance (for example, see U.S. Patent Application Publication Nos. 2006/0001073 and 2006/0231884).
In case that the air gap is formed using sacrifice nitride film containing a nitride film having fixed charges more than the oxide film, such the problem is occurred.